1. Field of the Invention
The present invention is directed to integrated circuits and, in particular, to generating a bandgap voltage.
2. Related Art
Most of the state of the art chips use dedicated circuits that regulate the voltage of the core circuitry. In many instances, these dedicated circuits are designed to create a reference voltage with high precision. The overall objective of designing a precision reference is to achieve high accuracy over all working conditions. These circuits should be made insensitive to external power supply variation, to temperature variation and to process variations. These circuits are designed utilizing bandgap voltage references.
The operation principle of bandgap voltage references is straightforward. The voltage difference between two diodes, often operated at the same current and of different junction areas, is used to generate a proportional to absolute temperature (PTAT) current (Iptat) in a first resistor. This current is used to generate a voltage across a second resistor. This voltage in turn is added to the voltage of one of the diodes (or a third one, in some implementations). The voltage across a diode operated at constant current, or here with a PTAT current, is complementary to absolute temperature (CTAT—reduces with increasing temperature), with approximately −2 mV/K. If the ratio between the first and second resistor is chosen properly, the first order effects of the temperature dependency of the diode and the PTAT current will cancel out. The resulting voltage is about 1.2-1.3 V, depending on the particular technology, and is close to the theoretical bandgap of silicon at 0 K. The remaining voltage change over the operating temperature of typical integrated circuits is on the order of a few millivolts. This temperature dependency has a typical parabolic behavior.
Because the output voltage is by definition fixed around 1.25 V for typical bandgap reference circuits, the minimum operating voltage is about 1.4 V, as in a CMOS circuit at least one drain-source voltage of a FET (field effect transistor) has to be added. Therefore, recent work concentrates on finding alternative solutions, in which for example currents are summed instead of voltages, resulting in a lower theoretical limit for the operating voltage.
FIG. 1 shows an example of circuit 100 that generates a bandgap reference voltage. The circuit 100 produces a current PTAT current Iptat. Due to the current mirror formed by FETs P3 and P4, the current Iout is roughly equal to Iptat. Of course, by varying the width of P3 and P4 relative to P2, the relationship between Iout and Iptat may be varied. The current Iout develops a voltage, equal to Iout R2 which, when added to the voltage drop across diode D3, provides an output reference voltage Vref with nominally zero temperature coefficient. The reference voltage Vref equals:Vref=VD3+IoutR2 Utilizing well known relationships, Iout may be represented as:Iout=(Vt.n.ln(r))/R1where Vt=KT/Q
n=pn-junction diode ideality coefficient
r=area ratio (A2/A1) between diode D2 and D1,
resulting in Vref=VD3+R2(Vt.n.ln(r))/R1)
The supply voltage variations have low impact on bandgap voltage deviation as long as the two voltages Vs1 and Vs2 are equal, which is insured if cascoded current mirror or operational amplifier techniques are used.
Iptat cancels only the first-order term in the polynomial approximation that represents relationship between the diode voltage and temperature. Thus, the Vref(Temp) curve exhibits a negative parabolic shape. By adjusting circuit elements R1, R2, and r, the value of the temperature coefficient (TC) at a given temperature (usually room temperature) can be set to zero.
The process sensitivity of is mainly due to the mismatch of the diodes D1-D3, that have different values depending on the position on the chip or from chip to chip, across a wafer. Several approaches have been used to minimize the impact of process variations on these type of circuits, all of those are associated to achieving the desired value of the Vref by tuning the value of the resistor R2 For example, a laser trimming technique may be used to achieve the desired value of the resistor R2. Depending on the methods used to trim, thin-film resistors can be trimmed to ±0.1 percent of value and thick-film resistors to ±1.0 percent. Unfortunately the process is slow, and this approach remains expensive.
Another approach has been link fuse trimming in which R2 is split into 2 series resistors, R2′ and R2″. Link fusing trimming is a process of selecting a desired resistance from a series of geometrically increasing resistors which comprise R2″ fused together by thin jumper wires. Connected to each end of a fuse are two probe pads. Through these probe pads, a current is applied to selected fuses and in doing so, blows open the fuse. In this approach, the resistor R2 is typically equal to 10K and could be trimmed by ±3%. Therefore, the resistor R2′ may consist of a fixed resistor of 9.7K in series with 5 geometrically increasing resistors (R2″) whose the total resistance is 600 ohm. The unit resistance being 20 ohm, to short circuit this resistor the un-blown fuse must have a resistance lower than 2 ohm, which is not realistic. Furthermore, accuracy concerns arise using this method.
Another approach is the so called “Zener zapping” technique, which consists of using a set of Zener diodes in parallel with a set of series connected resistors. An unwanted resistor is short circuited by blowing the Zener diode. However, precision accuracy poses a problem when using zener diode sets.
In short, each approach to making the typical PTAT current generator circuit shown in FIG. 1 impervious to process variations has significant drawbacks. What is needed, then, is an approach that achieves the goal of the above-described circuits without the same shortcomings.